MC68306FC16 Datasheet, PDF (84/191 Pages) Motorola, Inc – Integrated EC000 Processor

Table 4-5. Exception Vector Assignments
Vector
Number(s)
0
1
2
3
Vector Offset
(Hex)
000
004
008
00C
Space ⁶
SP
SP
SD
SD
Assignment
Reset Initial Interrupt Stack Pointer2
Reset Initial Program Counter ²
Bus Error
Address Error
4
010
SD Illegal Instruction
5
014
SD Integer Divide by Zero
6
018
SD CHK Instruction
7
01C
SD TRAPV Instruction
8
9
10
11
121
131
14
15
16–231
24
25
26
27
020
024
028
02C
030
034
038
03C
040–05C
060
064
068
06C
SD Privilege Violation
SD Trace
SD Line 1010 Emulator (Unimplemented A-Line Opcode)
SD Line 1111 Emulator (Unimplemented F-Line Opcode)
— (Unassigned, Reserved)
— (Unassigned, Reserved)
SD
Format Error ⁵
SD Uninitialized Interrupt Vector
— (Unassigned, Reserved)
SD
Spurious Interrupt ³
SD Level 1 Interrupt Autovector
SD Level 2 Interrupt Autovector
SD Level 3 Interrupt Autovector
28
29
30
31
32–47
48–631
070
074
078
07C
080–0BC
0C0–0FC
SD Level 4 Interrupt Autovector
SD Level 5 Interrupt Autovector
SD Level 6 Interrupt Autovector
SD Level 7 Interrupt Autovector
SD
TRAP #0–15 Instruction Vectors ⁴
— (Unassigned, Reserved)
64–255
100–3FC
SD User Defined Vectors
NOTES:
1. Vector numbers 12, 13, 16–23, and 48–63 are reserved for future enhancements by Motorola.
No user peripheral devices should be assigned these numbers.
2. Reset vector (0) requires four words, unlike the other vectors which only require two words,
and is located in the supervisor program space.
3. The spurious interrupt vector is taken when there is a bus error indication during interrupt processing.
4. TRAP #n uses vector number 32+ n.
5. Reserved.
6. SP denotes supervisor program space, and SD denotes supervisor data space.
4.6 PROCESSING OF SPECIFIC EXCEPTIONS
The exceptions are classified according to their sources, and each type is processed
differently. The following paragraphs describe in detail the types of exceptions and the
processing of each type.
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MC68306 USER'S MANUAL
MOTOROLA