MC68306FC16 Datasheet, PDF (79/191 Pages) Motorola, Inc – Integrated EC000 Processor

Table 4-4. EC000 Core Instruction Set Summary (Concluded)
Opcode
SBCD
Operation
Destination10 – Source ₁₀ – X ˘ Destination
Scc
STOP
SUB
If condition true
then 1s ˘ Destination
else 0s ˘ Destination
If supervisor state
then Immediate Data ˘ SR; STOP
else TRAP
Destination – Source ˘ Destination
SUBA
SUBI
SUBQ
SUBX
Destination – Source ˘ Destination
Destination – Immediate Data ˘ Destination
Destination – Immediate Data ˘ Destination
Destination – Source – X ˘ Destination
SWAP
Register 31–16 ¯ ˘ Register 15–0
TAS
Destination Tested ˘ Condition Codes;
1 ˘ bit 7 of Destination
TRAP
SSP – 2 ˘ SSP; Format ÷ Offset ˘ (SSP);
SSP – 4 ˘ SSP; PC ˘ (SSP); SSP – 2 ˘ SSP;
SR ˘ (SSP); Vector Address ˘ PC
TRAPV
If V
then TRAP
TST
Destination Tested ˘ Condition Codes
UNLK
An ˘ SP; (SP) ˘ An; SP + 4 ˘ SP
NOTES:
1. d is direction, left or right.
2. List refers to register.
Syntax
SBCD Dx,Dy
SBCD –(Ax),–(Ay)
Scc <ea>
STOP #<data>
SUB <ea>,Dn
SUB Dn,<ea>
SUBA <ea>,An
SUBI #<data>,<ea>
SUBQ #<data>,<ea>
SUBX Dx,Dy
SUBX –(Ax),–(Ay)
SWAP Dn
TAS <ea>
TRAP #<vector>
TRAPV
TST <ea>
UNLK An
MOTOROLA
MC68306 USER'S MANUAL
4-11