MC68306FC16 Datasheet, PDF (45/191 Pages) Motorola, Inc – Integrated EC000 Processor

There are two ways to arbitrate the bus, 3-wire and 2-wire bus arbitration. The EC000
core can do either 2-wire or 3-wire bus arbitration. Figures 3-12 and 3-14 show 3-wire bus
arbitration and Figures 3-13 and 5-15 show 2-wire bus arbitration. BGACK must be pulled
high for 2-wire bus arbitration.
PROCESSOR
GRANT BUS ARBITRATION
1) ASSERT BUS GRANT (BG)
TERMINATE ARBITRATION
1) NEGATE BG (AND WAIT FOR BGACK
TO BE NEGATED)
2) IF BR REMAINS ASSERTED AFTER
BGACK ASSERTED, RE-ASSERT BG.
REQUESTING DEVICE
REQUEST THE BUS
1) ASSERT BUS REQUEST (BR)
ACKNOWLEDGE BUS MASTERSHIP
1) EXTERNAL ARBITRATION DETER-
MINES NEXT BUS MASTER
2) NEXT BUS MASTER WAITS FOR
CURRENT CYCLE TO COMPLETE
3) NEXT BUS MASTER ASSERTS BUS
GRANT ACKNOWLEDGE (BGACK)
TO BECOME NEW MASTER
4) BUS MASTER NEGATES BR
OPERATE AS BUS MASTER
1) PERFORM DATA TRANSFERS (READ
AND WRITE CYCLES) ACCORDING
TO THE SAME RULES THE PRO-
CESSOR USES
REARBITRATE OR RESUME
PROCESSOR OPERATION
RELEASE BUS MASTERSHIP
1) NEGATE BGACK
Figure 3-12. Three-Wire Bus Arbitration Cycle Flowchart
MOTOROLA
MC68306 USER'S MANUAL
3-13