MC68306FC16 Datasheet, PDF (141/191 Pages) Motorola, Inc – Integrated EC000 Processor

DBB—Delta Break B
1 = Enable interrupt
0 = Disable interrupt
FFULLB—Channel B FIFO Full
1 = Enable interrupt
0 = Disable interrupt
TxRDYB, TxRDYA—Transmitter Ready
1 = Enable interrupt
0 = Disable interrupt
CTR/TMR_RDY—Counter/Timer Ready
1 = Enable interrupt
0 = Disable interrupt
DBA—Delta Break A
1 = Enable interrupt
0 = Disable interrupt
FFULLA—Channel A FIFO Full
1 = Enable interrupt
0 = Disable interrupt
6.4.1.12 COUNT REGISTER: CURRENT MSB OF COUNTER (DUCUR). This register
holds the most-significant byte of the current value in the counter/timer. It should only be
read when the counter/timer is in counter mode and the counter is stopped. See 6.3.5
Counter/Timer for further information.
6.4.1.13 COUNT REGISTER: CURRENT LSB OF COUNTER (DUCLR). This register
holds the least-significant byte of the current value in the counter/timer. It should only be
read when the counter/timer is in counter mode and the counter is stopped. See 6.3.5
Counter/Timerfor further information.
6.4.1.14 COUNTER/TIMER UPPER PRELOAD REGISTER (DUCTUR). This register
holds the eight most-significant bits of the preload value to be used by the conter/timer in
either the count or timer mode. The minimum value that can be loaded on the
concatenation of DUCTUR with DUCTLR is 0002 (hex). This register is write only and
cannot be read by the CPU.
6.4.1.15 COUNTER/TIMER LOWER PRELOAD REGISTER (DUCTLR). This register
holds the eight least-significant bits of the preload value to be used by the conter/timer in
either the count or timer mode. The minimum value that can be loaded on the
concatenation of DUCTUR with DUCTLR is 0002 (hex). This register is write only and
cannot be read by the CPU.
MOTOROLA
MC68306 USER'S MANUAL
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