MC68306FC16 Datasheet, PDF (46/191 Pages) Motorola, Inc – Integrated EC000 Processor

PROCESSOR
GRANT BUS ARBITRATION
1) ASSERT BUS GRANT (BG)
ACKNOWLEDGE RELEASE OF
BUS MASTERSHIP
1) NEGATE BUS GRANT (BG)
REQUESTING DEVICE
REQUEST THE BUS
1) ASSERT BUS REQUEST (BR)
OPERATE AS BUS MASTER
1) EXTERNAL ARBITRATION DETER-
MINES NEXT BUS MASTER
2) NEXT BUS MASTER WAITS FOR
CURRENT CYCLE TO COMPLETE
RELEASE BUS MASTERSHIP
1) NEGATE BUS REQUEST (BR)
REARBITRATE OR RESUME
PROCESSOR OPERATION
Figure 3-13. Two-Wire Bus Arbitration Cycle Flowchart
3-14
MC68306 USER'S MANUAL
MOTOROLA