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PIC24FJ128GA Datasheet, PDF (97/232 Pages) Microchip Technology – General Purpose, 16-Bit Flash Microcontrollers
PIC24FJ128GA FAMILY
REGISTER 7-3: OSCTUN: FRC OSCILLATOR TUNE REGISTER
Upper Byte:
U-0
U-0
U-0
U-0
U-0
U-0
U-0
—
—
—
—
—
—
—
bit 15
U-0
—
bit 8
Lower Byte:
U-0
U-0
—
—
bit 7
R/W-0
TUN5
R/W-0
TUN4
R/W-0
TUN3
R/W-0
TUN2
R/W-0
TUN1
R/W-0
TUN0
bit 0
bit 15-6
bit 5-0
Unimplemented: Read as ‘0’
TUN5:TUN0: FRC Oscillator Tuning bits
011111 = Maximum frequency deviation
011110 =
•
•
•
000001 =
000000 = Center frequency, oscillator is running at factory calibrated frequency
111111 =
•
•
•
100001 =
100000 = Minimum frequency deviation
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
7.4 Clock Switching Operation
With few limitations, applications are free to switch
between any of the four clock sources (POSC, SOSC,
FRC and LPRC) under software control and at any
time. To limit the possible side effects that could result
from this flexibility, PIC24 devices have a safeguard
lock built into the switching process.
Note:
Primary Oscillator mode has three
different submodes (XT, HS and EC)
which are determined by the POSCMD
Configuration bits. While an application
can switch to and from Primary Oscillator
mode in software, it cannot switch
between the different primary submodes
without reprogramming the device.
7.4.1 ENABLING CLOCK SWITCHING
To enable clock switching, the FCKSM1 Configuration
bit in the Configuration register must be programmed to
‘0’. (Refer to Section 23.1 “Configuration Bits” for
further details.) If the FCKSM1 Configuration bit is
unprogrammed (‘1’), the clock switching function and
Fail-Safe Clock Monitor function are disabled. This is
the default setting.
The NOSC control bits (OSCCON<10:8>) do not
control the clock selection when clock switching is dis-
abled. However, the COSC bits (OSCCON<14:12>)
will reflect the clock source selected by the FNOSC
Configuration bits.
The OSWEN control bit (OSCCON<0>) has no effect
when clock switching is disabled. It is held at ‘0’ at all
times.
© 2006 Microchip Technology Inc.
Preliminary
DS39747C-page 95