PIC24FJ128GA Datasheet, PDF (54/232 Pages) Microchip Technology – General Purpose, 16-Bit Flash Microcontrollers

PIC24FJ128GA FAMILY
REGISTER 5-1: RCON: RESET CONTROL REGISTER
Upper Byte:
R/W-0
R/W-0
U-0
U-0
U-0
U-0
TRAPR IOPUWR
—
—
—
—
bit 15
R/W-0
CM
R/W-0
VREGS
bit 8
Lower Byte:
R/W-0
R/W-0
EXTR
SWR
bit 7
R/W-0
SWDTEN
R/W-0
WDTO
R/W-0
SLEEP
R/W-0
IDLE
R/W-1
BOR
R/W-1
POR
bit 0
bit 15 TRAPR: Trap Reset Flag bit
1 = A Trap Conflict Reset has occurred
0 = A Trap Conflict Reset has not occurred
bit 14 IOPUWR: Illegal Opcode or Uninitialized W Access Reset Flag bit
1 = An illegal opcode detection, an illegal address mode, or uninitialized W register used as an Address
Pointer caused a Reset
0 = An illegal opcode or uninitialized W Reset has not occurred
bit 13-10 Unimplemented: Read as ‘0’
bit 9
CM: Configuration Word Mismatch Reset Flag bit
1 = A Configuration Word Mismatch Reset has occurred
0 = A Configuration Word Mismatch Reset has not occurred
bit 8
VREGS: Voltage Regulator Standby Enable bit
1 = Regulator remains active during Sleep
0 = Regulator goes to standby during Sleep
bit 7
EXTR: External Reset (MCLR) Pin bit
1 = A Master Clear (pin) Reset has occurred
0 = A Master Clear (pin) Reset has not occurred
bit 6
SWR: Software Reset (Instruction) Flag bit
1 = A RESET instruction has been executed
0 = A RESET instruction has not been executed
bit 5
SWDTEN: Software Enable/Disable of WDT bit
1 = WDT is enabled
0 = WDT is disabled
Note: If the FWDTEN Configuration bit is ‘1’ (unprogrammed), the WDT is always enabled, regardless
of the SWDTEN bit setting.
bit 4
WDTO: Watchdog Timer Time-out Flag bit
1 = WDT time-out has occurred
0 = WDT time-out has not occurred
bit 3
SLEEP: Wake From Sleep Flag bit
1 = Device has been in Sleep mode
0 = Device has not been in Sleep mode
bit 2
IDLE: Wake-up From Idle Flag bit
1 = Device was in Idle mode
0 = Device was not in Idle mode
bit 1
BOR: Brown-out Reset Flag bit
1 = A Brown-out Reset has occurred. Note that BOR is also set after Power-on Reset.
0 = A Brown-out Reset has not occurred
bit 0
POR: Power-on Reset Flag bit
1 = A Power-up Reset has occurred
0 = A Power-up Reset has not occurred
Note: All of the Reset status bits may be set or cleared in software. Setting one of these bits in software
does not cause a device Reset.
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
DS39747C-page 52
Preliminary
© 2006 Microchip Technology Inc.