PIC24FJ128GA Datasheet, PDF (181/232 Pages) Microchip Technology – General Purpose, 16-Bit Flash Microcontrollers

PIC24FJ128GA FAMILY
23.0 SPECIAL FEATURES
Note:
This data sheet summarizes the features
of this group of PIC24FJ devices. It is not
intended to be a comprehensive reference
source.
PIC24FJ128GA family devices include several
features intended to maximize application flexibility and
reliability, and minimize cost through elimination of
external components. These are:
• Flexible Configuration
• Watchdog Timer (WDT)
• Code Protection
• JTAG Boundary Scan Interface
• In-Circuit Serial Programming
• In-Circuit Emulation
23.1 Configuration Bits
The Configuration bits can be programmed (read as
‘0’), or left unprogrammed (read as ‘1’), to select vari-
ous device configurations. These bits are mapped
starting at program memory location F80000h. A com-
plete list is shown in Table 23-1. A detailed explanation
of the various bit functions is provided in Register 23-1
through Register 23-4.
Note that address F80000h is beyond the user program
memory space. In fact, it belongs to the configuration
memory space (800000h-FFFFFFh) which can only be
accessed using table reads and table writes.
23.1.1
CONSIDERATIONS FOR
CONFIGURING PIC24FJ128GA
FAMILY DEVICES
In PIC24FJ128GA family devices, the configuration
bytes are implemented as volatile memory. This means
that configuration data must be programmed each time
the device is powered up. Configuration data is stored
in the two words at the top of the on-chip program
memory space, known as the Flash Configuration
Words. Their specific locations are shown in
Table 23-1. These are packed representations of the
actual device Configuration bits, whose actual
locations are distributed among five locations in config-
uration space. The configuration data is automatically
loaded from the Flash Configuration Words to the
proper Configuration registers during device Resets.
TABLE 23-1:
FLASH CONFIGURATION
WORDS LOCATIONS FOR
PIC24FJ128GA FAMILY
DEVICES
Device
Configuration Word
Addresses
1
2
PIC24FJ64GA
PIC24FJ96GA
PIC24FJ128GA
00ABFEh
00FFFEh
0157FEh
00ABFCh
00FFFCh
0157FCh
When creating applications for these devices, users
should always specifically allocate the location of the
Flash Configuration Word for configuration data. This is
to make certain that program code is not stored in this
address when the code is compiled.
The volatile memory cells used for the Configuration
bits always reset to ‘1’ on Power-on Resets. For all
other type of Reset events, the previously programmed
values are maintained and used without reloading from
program memory.
The upper byte of both Flash Configuration Words in
program memory should always be ‘1111 1111’. This
makes them appear to be NOP instructions in the
remote event that their locations are ever executed by
accident. Since Configuration bits are not implemented
in the corresponding locations, writing ‘1’s to these
locations has no effect on device operation.
To prevent inadvertent configuration changes during
code execution, all programmable Configuration bits
are write-once. After a bit is initially programmed during
a power cycle, it cannot be written to again. Changing
a device configuration requires that power to the device
be cycled.
© 2006 Microchip Technology Inc.
Preliminary
DS39747C-page 179