PIC24FJ128GA Datasheet, PDF (94/232 Pages) Microchip Technology – General Purpose, 16-Bit Flash Microcontrollers

PIC24FJ128GA FAMILY
7.2 Oscillator Configuration
The oscillator source (and operating mode) that is
used at a device Power-on Reset event is selected
using Configuration bit settings. The oscillator Config-
uration bit settings are located in the Configuration
registers in the program memory (refer to
Section 23.1 “Configuration Bits” for further
details.) The Primary Oscillator Configuration bits,
POSCMD1:POSCMD0 (Configuration Word 2<1:0>),
and the Initial Oscillator Select Configuration bits,
FNOSC2:FNOSC0 (Configuration Word 2<10:8>),
select the oscillator source that is used at a Power-on
Reset. The FRC primary oscillator with postscaler
(FRCDIV) is the default (unprogrammed) selection.
The secondary oscillator, or one of the internal
oscillators, may be chosen by programming these bit
locations.
The Configuration bits allow users to choose between
the various clock modes, shown in Table 7-1.
7.2.1
CLOCK SWITCHING MODE
CONFIGURATION BITS
The FCKSM Configuration bits (Configuration Word 2<7:6>)
are used to jointly configure device clock switching and
the Fail-Safe Clock Monitor (FSCM). Clock switching is
enabled only when FCKSM1 is programmed (‘0’). The
FSCM is enabled only when FCKSM1:FCKSM0 are
both programmed (‘00’).
TABLE 7-1: CONFIGURATION BIT VALUES FOR CLOCK SELECTION
Oscillator Mode
Oscillator Source
POSCMD1:
POSCMD0
Fast RC Oscillator with Postscaler
Internal
00
(FRCDIV)
(Reserved)
Internal
00
Low-Power RC Oscillator (LPRC)
Internal
00
Secondary (Timer1) Oscillator
Secondary
00
(SOSC)
Primary Oscillator (HS) with PLL
Primary
10
Module (HSPLL)
Primary Oscillator (XT) with PLL
Primary
01
Module (ECPLL)
Primary Oscillator (EC) with PLL
Primary
00
Module (XTPLL)
Primary Oscillator (HS)
Primary
10
Primary Oscillator (XT)
Primary
01
Primary Oscillator (EC)
Primary
00
Fast RC Oscillator with PLL Module
Internal
00
(FRCPLL)
Fast RC Oscillator (FRC)
Internal
00
Note 1: OSC2 pin function is determined by the OSCIOFNC Configuration bit.
2: This is the default oscillator mode for an unprogrammed (erased) device.
FNOSC2:
FNOSC0
111
110
101
100
011
011
011
010
010
010
001
000
Note
1, 2
1
1
1
1
1
7.3 Control Registers
The operation of the oscillator is controlled by three
Special Function Registers:
• OSCCON
• CLKDIV
• OSCTUN
The OSCCON register (Register 7-1) is the main con-
trol register for the oscillator. It controls clock source
switching, and allows the monitoring of clock sources.
The Clock Divider register (Register 7-2) controls the
features associated with Doze mode, as well as the
postscaler for the FRC oscillator.
The FRC Oscillator Tune register (Register 7-3) allows
the user to fine tune the FRC oscillator over a range of
approximately ±12%. Each bit increment or decrement
changes the factory calibrated frequency of the FRC
oscillator by a fixed amount.
DS39747C-page 92
Preliminary
© 2006 Microchip Technology Inc.