PIC24FJ128GA Datasheet, PDF (64/232 Pages) Microchip Technology – General Purpose, 16-Bit Flash Microcontrollers

PIC24FJ128GA FAMILY
REGISTER 6-3: INTCON1: INTERRUPT CONTROL REGISTER 1
Upper Byte:
R/W-0
U-0
U-0
U-0
U-0
U-0
U-0
NSTDIS
—
—
—
—
—
—
bit 15
U-0
—
bit 8
Lower Byte:
U-0
U-0
—
—
bit 7
U-0
R/W-0
R/W-0
R/W-0
R/W-0
—
MATHERR ADDRERR STKERR OSCFAIL
U-0
—
bit 0
bit 15
bit 14-5
bit 4
bit 3
bit 2
bit 1
bit 0
.
NSTDIS: Interrupt Nesting Disable bit
1 = Interrupt nesting is disabled
0 = Interrupt nesting is enabled
Unimplemented: Read as ‘0’
MATHERR: Arithmetic Error Trap Status bit
1 = Overflow trap has occurred
0 = Overflow trap has not occurred
ADDRERR: Address Error Trap Status bit
1 = Address error trap has occurred
0 = Address error trap has not occurred
STKERR: Stack Error Trap Status bit
1 = Stack error trap has occurred
0 = Stack error trap has not occurred
OSCFAIL: Oscillator Failure Trap Status bit
1 = Oscillator failure trap has occurred
0 = Oscillator failure trap has not occurred
Unimplemented: Read as ‘0’
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
DS39747C-page 62
Preliminary
© 2006 Microchip Technology Inc.