PIC24FJ128GA Datasheet, PDF (36/232 Pages) Microchip Technology – General Purpose, 16-Bit Flash Microcontrollers

TABLE 3-11: UART1 REGISTER MAP
File Name Addr Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9
Bit 8
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
U1MODE
U1STA
U1TXREG
U1RXREG
U1BRG
Legend:
0220 UARTEN
—
USIDL IREN RTSMD
—
UEN1 UEN0
WAKE LPBACK
0222 UTXISEL1 UTXINV UTXISEL0 — UTXBRK UTXEN UTXBF TRMT URXISEL1 URXISEL0
0224
—
—
—
—
—
—
—
0226
—
—
—
—
—
—
—
0228
Baud Rate Generator Prescaler
x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
ABAUD RXINV BRGH
ADDEN RIDLE PERR
Transmit Register
Receive Register
Bit 2
Bit 1
Bit 0
All
Resets
PDSEL1 PDSEL0 STSEL
FERR OERR URXDA
0000
0110
xxxx
0000
0000
TABLE 3-12: UART2 REGISTER MAP
File Name Addr Bit 15
Bit 14
Bit 13 Bit 12 Bit 11 Bit 10 Bit 9
Bit 8
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
U2MODE
U2STA
U2TXREG
U2RXREG
U2BRG
Legend:
0230 UARTEN
—
USIDL IREN RTSMD
—
UEN1 UEN0
WAKE LPBACK
0232 UTXISEL1 UTXINV UTXISEL0 — UTXBRK UTXEN UTXBF TRMT URXISEL1 URXISEL0
0234
—
—
—
—
—
—
—
0236
—
—
—
—
—
—
—
0238
Baud Rate Generator Prescaler
x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
ABAUD RXINV BRGH
ADDEN RIDLE PERR
Transmit Register
Receive Register
Bit 2
Bit 1
Bit 0
PDSEL1 PDSEL0 STSEL
FERR OERR URXDA
All
Resets
0000
0110
xxxx
0000
0000
TABLE 3-13: SPI1 REGISTER MAP
File Name Addr Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9
Bit 8
Bit 7
Bit 6
Bit 5
SPI1STAT
SPI1CON1
SPI1CON2
SPI1BUF
Legend:
0240 SPIEN
—
SPISIDL
—
— SPIBEC2 SPIBEC1 SPIBEC0 —
SPIROV
0242
—
—
—
DISSCK DISSDO MODE16 SMP
CKE
SSEN
CKP
0244 FRMEN SPIFSD SPIFPOL —
—
—
—
—
—
—
0248
SPI1 Transmit and Receive Buffer
— = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
—
MSTEN
—
Bit 4
—
SPRE2
—
Bit 3
—
SPRE1
—
Bit 2
—
SPRE0
—
Bit 1
Bit 0
All
Resets
SPITBF
PPRE1
SPIFE
SPIRBF
PPRE0
SPIBEN
0000
0000
0000
0000
TABLE 3-14: SPI2 REGISTER MAP
File Name Addr Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9
Bit 8
Bit 7
Bit 6
Bit 5
SPI2STAT
SPI2CON1
SPI2CON2
SPI2BUF
Legend:
0260 SPIEN
—
SPISIDL
—
— SPIBEC2 SPIBEC1 SPIBEC0 —
SPIROV
0262
—
—
—
DISSCK DISSDO MODE16 SMP
CKE
SSEN
CKP
0264 FRMEN SPIFSD SPIFPOL —
—
—
—
—
—
—
0268
SPI2 Transmit and Receive Buffer
— = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
—
MSTEN
—
Bit 4
—
SPRE2
—
Bit 3
—
SPRE1
—
Bit 2
—
SPRE0
—
Bit 1
Bit 0
All
Resets
SPITBF
PPRE1
SPIFE
SPIRBF
PPRE0
SPIBEN
0000
0000
0000
0000