PIC24FJ128GA Datasheet, PDF (49/232 Pages) Microchip Technology – General Purpose, 16-Bit Flash Microcontrollers

PIC24FJ128GA FAMILY
REGISTER 4-1: NVMCOM: FLASH MEMORY CONTROL REGISTER
Upper Byte:
R/SO-0⁽¹⁾ R/W-0⁽¹⁾ R/W-0⁽¹⁾
U-0
U-0
U-0
U-0
WR
WREN WRERR
—
—
—
—
bit 15
U-0
—
bit 8
Lower Byte:
U-0
R/W-0⁽¹⁾
U-0
—
ERASE
—
bit 7
U-0
R/W-0⁽¹⁾ R/W-0⁽¹⁾ R/W-0⁽¹⁾ R/W-0⁽¹⁾
—
NVMOP3⁽²⁾ NVMOP2⁽²⁾ NVMOP1⁽²⁾ NVMOP0⁽²⁾
bit 0
bit 15
bit 14
bit 13
bit 12-7
bit 6
bit 5-4
bit 3-0
WR: Write Control bit
1 = Initiates a Flash memory program or erase operation
The operation is self-timed and the bit is cleared by hardware once operation is complete.
0 = Program or erase operation is complete and inactive
WREN: Write Enable bit
1 = Enable Flash program/erase operations
0 = Inhibit Flash program/erase operations
WRERR: Write Sequence Error Flag bit
1 = An improper program or erase sequence attempt or termination has occurred (bit is set automatically
on any set attempt of the WR bit)
0 = The program or erase operation completed normally
Unimplemented: Read as ‘0’
ERASE: Erase/Program Enable bit
1 = Perform the erase operation specified by NVMOP3:NVMOP0 on the next WR command
0 = Perform the program operation specified by NVMOP3:NVMOP0 on the next WR command
Unimplemented: Read as ‘0’
NVMOP3:NVMOP0: NVM Operation Select bits⁽²⁾
1111 = Memory bulk erase operation (ERASE = 1) or no operation (ERASE = 0)
0010 = Memory row erase operation (ERASE = 1) or no operation (ERASE = 0)
0001 = Memory row program operation (ERASE = 0) or no operation (ERASE = 1)
Note 1: These bits can only be reset on POR.
2: All other combinations of NVMOP3:NVMOP0 are unimplemented.
Legend:
R = Readable bit
-n = Value at Reset
W = Writable bit
‘1’ = Bit is set
SO = Settable-Only bit
‘0’ = Bit is cleared
U = Unimplemented bit
x = Bit is unknown
© 2006 Microchip Technology Inc.
Preliminary
DS39747C-page 47