PIC24FJ128GA Datasheet, PDF (93/232 Pages) Microchip Technology – General Purpose, 16-Bit Flash Microcontrollers

PIC24FJ128GA FAMILY
7.0 OSCILLATOR
CONFIGURATION
Note:
This data sheet summarizes the features
of this group of PIC24FJ devices. It is not
intended to be a comprehensive reference
source.
The oscillator system for PIC24FJ128GA family
devices has the following features:
• A total of four external and internal oscillator options
as clock sources, providing 11 different clock modes
• On-chip 4x PLL to boost internal operating frequency
on select internal and external oscillator sources
• Software-controllable switching between various
clock sources
• Software-controllable postscaler for selective
clocking of CPU for system power savings
• A Fail-Safe Clock Monitor (FSCM) that detects
clock failure and permits safe application recovery
or shutdown
A simplified diagram of the oscillator system is shown
in Figure 7-1.
FIGURE 7-1:
PIC24FJ128GA FAMILY CLOCK DIAGRAM
OSC1
OSC2
Primary Oscillator
8 MHz
4 MHz
PIC24FJ128GA Family
XT, HS, EC
4 x PLL
XTPLL, HSPLL,
ECPLL, FRCPLL
CLKO
CLKDIV<14:12>
CPU
FRC
Oscillator _{8 MHz}
(Nominal)
CLKDIV<10:8>
FRCDIV
FRC
Peripherals
SOSCO
SOSCI
LPRC
Oscillator _{31 kHz (Nominal)}
Secondary Oscillator
SOSCEN
Enable
Oscillator
7.1 CPU Clocking Scheme
The system clock source can be provided by one of
four sources:
• Primary Oscillator (POSC) on the OSC1 and
OSC2 pins
• Secondary Oscillator (SOSC) on the SOSCI and
SOSCO pins
• Fast Internal RC (FRC) Oscillator
• Low-Power Internal RC (LPRC) Oscillator
LPRC
SOSC
Clock Control Logic
Fail-Safe
Clock
Monitor
WDT, PWRT
Clock Source Option
for other Modules
The primary oscillator and FRC sources have the
option of using the internal 4x PLL. The frequency of
the FRC clock source can optionally be reduced by the
programmable clock divider. The selected clock source
generates the processor and peripheral clock sources.
The processor clock source is divided by two to pro-
duce the internal instruction cycle clock, FCY. In this
document, the instruction cycle clock is also denoted
by FOSC/2. The internal instruction cycle clock, FOSC/2,
can be provided on the OSC2 I/O pin for some
operating modes of the primary oscillator.
© 2006 Microchip Technology Inc.
Preliminary
DS39747C-page 91