PIC24FJ128GA Datasheet, PDF (112/232 Pages) Microchip Technology – General Purpose, 16-Bit Flash Microcontrollers

PIC24FJ128GA FAMILY
12.1 Input Capture Registers
REGISTER 12-1: ICxCON: INPUT CAPTURE x CONTROL REGISTER
Upper Byte:
U-0
U-0
R/W-0
U-0
U-0
U-0
U-0
—
—
ICSIDL
—
—
—
—
bit 15
U-0
—
bit 8
Lower Byte:
R/W-0
R/W-0
ICTMR
ICI1
bit 7
R/W-0
ICI0
R-0, HC
ICOV
R-0, HC
ICBNE
R/W-0
ICM2
R/W-0
ICM1
R/W-0
ICM0
bit 0
bit 15-14 Unimplemented: Read as ‘0’
bit 13
ICSIDL: Input Capture x Module Stop in Idle Control bit
1 = Input capture module will halt in CPU Idle mode
0 = Input capture module will continue to operate in CPU Idle mode
bit 12-8 Unimplemented: Read as ‘0’
bit 7
ICTMR: Input Capture x Timer Select bit
1 = TMR2 contents are captured on capture event
0 = TMR3 contents are captured on capture event
Note: Timer selections may vary. Refer to the device data sheet for details.
bit 6-5
ICI1:ICI0: Select Number of Captures per Interrupt bits
11 = Interrupt on every fourth capture event
10 = Interrupt on every third capture event
01 = Interrupt on every second capture event
00 = Interrupt on every capture event
bit 4
ICOV: Input Capture x Overflow Status Flag (Read-Only) bit
1 = Input capture overflow occurred
0 = No input capture overflow occurred
bit 3
ICBNE: Input Capture x Buffer Empty Status (Read-Only) bit
1 = Input capture buffer is not empty, at least one more capture value can be read
0 = Input capture buffer is empty
bit 2-0
ICM2:ICM0: Input Capture x Mode Select bits
111 = Input capture functions as interrupt pin only when device is in Sleep or Idle mode
(rising edge detect only, all other control bits are not applicable)
110 = Unused (module disabled)
101 = Capture mode, every 16th rising edge
100 = Capture mode, every 4th rising edge
011 = Capture mode, every rising edge
010 = Capture mode, every falling edge
001 = Capture mode, every edge (rising and falling) – ICI<1:0> does not control interrupt generation
for this mode
000 = Input capture module turned off
Legend:
R = Readable bit
-n = Value at POR
U = Unimplemented bit, read as ‘0’
W = Writable bit
HS = Set in Hardware
‘1’ = Bit is set
‘0’ = Bit is cleared
HC = Cleared in Hardware
x = Bit is unknown
DS39747C-page 110
Preliminary
© 2006 Microchip Technology Inc.