PIC24FJ128GA Datasheet, PDF (96/232 Pages) Microchip Technology – General Purpose, 16-Bit Flash Microcontrollers

PIC24FJ128GA FAMILY
REGISTER 7-2: CLKDIV: CLOCK DIVIDER REGISTER
Upper Byte:
R/W-0
ROI
R/W-0
DOZE2
R/W-0
DOZE1
R/W-0
R/W-0
R/W-0
DOZE0 DOZEN⁽¹⁾ RCDIV2
bit 15
R/W-1
RCDIV1
R/W-1
RCDIV0
bit 8
Lower Byte:
U-0
U-0
U-0
U-0
U-0
U-0
U-0
U-0
—
—
—
—
—
—
—
—
bit 7
bit 0
bit 15 ROI: Recover on Interrupt bit
1 = Interrupts clear the DOZEN bit and reset the CPU peripheral clock ratio to 1:1
0 = Interrupts have no effect on the DOZEN bit
bit 14-12 DOZE2:DOZE0: CPU Peripheral Clock Ratio Select bits
bit 11
111 = 1:128
110 = 1:64
101 = 1:32
100 = 1:16
011 = 1:8
010 = 1:4
001 = 1:2
000 = 1:1
DOZEN: DOZE Enable bit⁽¹⁾
1 = DOZE2:DOZE0 bits specify the CPU peripheral clock ratio
0 = CPU peripheral clock ratio set to 1:1
Note 1: This bit is automatically cleared when the ROI bit is set and an interrupt occurs.
bit 10-8
bit 7-0
RCDIV2:RCDIV0: FRC Postscaler Select bits
111 = 31.25 kHz (divide by 256)
110 = 125 kHz (divide by 64)
101 = 250 kHz (divide by 32)
100 = 500 kHz (divide by 16)
011 = 1 MHz (divide by 8)
010 = 2 MHz (divide by 4)
001 = 4 MHz (divide by 2)
000 = 8 MHz (divide by 1)
Unimplemented: Read as ‘0’
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
DS39747C-page 94
Preliminary
© 2006 Microchip Technology Inc.