PIC24FJ128GA Datasheet, PDF (156/232 Pages) Microchip Technology – General Purpose, 16-Bit Flash Microcontrollers

PIC24FJ128GA FAMILY
REGISTER 18-3: ALCFGRPT: ALARM CONFIGURATION REGISTER
Upper Byte:
R/W-0
R/W-0
R/W-0
R/W-0 R/W-0 R/W-0
R/W-0
R/W-0
ALRMEN CHIME AMASK3 AMASK2 AMASK1 AMASK0 ALRMPTR1 ALRMPTR0
bit 15
bit 8
Lower Byte:
R/W-0
R/W-0
ARPT7 ARPT6
bit 7
R/W-0
ARPT5
R/W-0
ARPT4
R/W-0
ARPT3
R/W-0
ARPT2
R/W-0
ARPT1
R/W-0
ARPT0
bit 0
bit 15 ALRMEN: Alarm Enable bit
1 = Alarm is enabled (cleared automatically after an alarm event whenever ARPT<7:0> = 00 and
CHIME = 0)
0 = Alarm is disabled
bit 14 CHIME: Chime Enable bit
1 = Chime is enabled; ARPT<7:0> is allowed to roll over from 00h to FFh
0 = Chime is disabled; ARPT<7:0> stops once it reaches 00h
bit 13-10 AMASK3:AMASK0: Alarm Mask Configuration bits
0000 = Every half second
0001 = Every second
0010 = Every 10 seconds
0011 = Every minute
0100 = Every 10 minutes
0101 = Every hour
0110 = Once a day
0111 =
1000 =
1001 =
101x =
11xx =
Once a week
Once a month
Once a year (except when configured for February 29th, once every 4 years)
Reserved – do not use
Reserved – do not use
bit 9-8
ALRMPTR1:ALRMPTR0: Alarm Value Register Window Pointer bits
Points to the corresponding Alarm Value registers when reading ALRMVALH and ALRMVALL registers; the
ALRMPTR<1:0> value decrements on every read or write of ALRMVALH until it reaches ‘00’.
ALRMVAL<15:8>:
00 = ALRMMIN
01 = ALRMWD
10 = ALRMMNTH
11 = Unimplemented
ALRMVAL<7:0>:
00 = ALRMSEC
01 = ALRMHR
10 = ALRMDAY
11 = Unimplemented
bit 7-0 ARPT7:ARPT0: Alarm Repeat Counter Value bits
11111111 = Alarm will repeat 255 more times
...
00000000 = Alarm will not repeat
The counter decrements on any alarm event. The counter is prevented from rolling over from 00h to FFh
unless CHIME = 1.
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
DS39747C-page 154
Preliminary
© 2006 Microchip Technology Inc.