PIC24FJ128GA Datasheet, PDF (108/232 Pages) Microchip Technology – General Purpose, 16-Bit Flash Microcontrollers

PIC24FJ128GA FAMILY
REGISTER 11-1: TxCON: TIMER2 AND TIMER4 CONTROL REGISTER
Upper Byte:
R/W-0
U-0
R/W-0
U-0
U-0
U-0
U-0
TON
—
TSIDL
—
—
—
—
bit 15
U-0
—
bit 8
Lower Byte:
U-0
R/W-0
R/W-0
R/W-0
R/W-0
U-0
R/W-0
—
TGATE TCKPS1 TCKPS0
T32
—
TCS
bit 7
U-0
—
bit 0
bit 15
bit 14
bit 13
bit 12-7
bit 6
bit 5-4
bit 3
bit 2
bit 1
bit 0
TON: Timerx On bit
When TxCON<3> = 1:
1 = Starts 32-bit Timerx/y
0 = Stops 32-bit Timerx/y
When TxCON<3> = 0:
1 = Starts 16-bit Timerx
0 = Stops 16-bit Timerx
Unimplemented: Read as ‘0’
TSIDL: Stop in Idle Mode bit
1 = Discontinue module operation when device enters Idle mode
0 = Continue module operation in Idle mode
Unimplemented: Read as ‘0’
TGATE: Timerx Gated Time Accumulation Enable bit
When TCS = 1:
This bit is ignored.
When TCS = 0:
1 = Gated time accumulation enabled
0 = Gated time accumulation disabled
TCKPS1:TCKPS0: Timer2 Input Clock Prescale Select bits
11 = 1:256
10 = 1:64
01 = 1:8
00 = 1:1
T32: 32-bit Timer Mode Select bit
1 = Timerx and Timery form a single 32-bit timer
0 = Timerx and Timery act as two 16-bit timers
Note: In 32-bit mode, T3CON control bits do not affect 32-bit timer operation.
Unimplemented: Read as ‘0’
TCS: Timerx Clock Source Select bit
1 = External clock from pin TxCK (on the rising edge)
0 = Internal clock (FOSC/2)
Unimplemented: Read as ‘0’
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
DS39747C-page 106
Preliminary
© 2006 Microchip Technology Inc.