82375EB Datasheet, PDF (87/131 Pages) Intel Corporation – PCI-EISA BRIDGE (PCEB)

82375EB SB
This register defaults to 04h at reset This selects fixed mode 4 with the CPU the highest priority device
guaranteeing that BIOS accesses can take place
ARBPRIX Register
Bit
Description
7
Bank 3 Fixed Priority Mode select
60
Reserved
This register defaults to 00h at reset The default value selects REQ1 as a higher priority request than
REQ2 when Bank 3 operates in the fixed priority mode
5 4 1 1 Fixed Priority Mode
The twelve selectable fixed priority schemes are listed in Table 6
Table 6 Fixed Priority Mode Bank Control Bits
Mode
Bank
Priority
3 2b 2a 1 0 Highest
0 0 0 0 0 0 PCEBREQ REQ0
REQ1
REQ2
CPUREQ
1 0 0 0 0 1 REQ0
PCEBREQ
REQ1
REQ2
CPUREQ
2 0 0 0 1 0 PCEBREQ REQ0
REQ1
REQ2
REQ3
3 0 0 0 1 1 REQ0
PCEBREQ
REQ1
REQ2
REQ3
4 0 0 1 0 0 CPUREQ
REQ3
PCEBREQ REQ0
5 0 0 1 0 1 CPUREQ
REQ3
REQ0
PCEBREQ
6 0 0 1 1 0 REQ3
CPUREQ
PCEBREQ REQ0
7 0 0 1 1 1 REQ3
CPUREQ
REQ0
PCEBREQ
8 0 1 0 0 0 REQ1
REQ2
9 0 1 0 0 1 REQ1
REQ2
A 0 1 0 1 0 REQ1
REQ2
B 0 1 0 1 1 REQ1
REQ2
CPUREQ
CPUREQ
REQ3
REQ3
REQ3
REQ3
CPUREQ
CPUREQ
PCEBREQ
REQ0
PCEBREQ
REQ0
Lowest
REQ3
REQ3
CPUREQ
CPUREQ
REQ1
REQ2
REQ1
REQ2
REQ1
REQ2
REQ1
REQ2
REQ0
PCEBREQ
REQ0
PCEBREQ
87