82375EB Datasheet, PDF (128/131 Pages) Intel Corporation – PCI-EISA BRIDGE (PCEB)

82375EB SB
13 0 TESTABILITY
13 1 NAND Tree
A NAND Tree is provided primarily for VIL VIH testing The NAND Tree is also useful for Automated Test
Equipment (ATE) at board level testing The NAND Tree allows the tester to test the solder connections for
each individual signal pin
The TEST pin along with BCLK PIODEC and EX16 activates the NAND Tree The following combina-
tions of PIODEC EX16 and TEST causes each buffer to be tri-stated
PIODEC ^e1 and EX16 ^e0 and TEST ^e0
or
PIODEC ^e0 and EX16 ^e1
Care must be taken as the test is in progress to ensure that one of the preceding combinations is valid
Otherwise the test mode will be exited
Asserting TEST causes the output pulse train to appear on the EISAHLDA pin BCLK must be driven low in
order to enable the NAND Tree
The sequence of the ATE test is as follows
1 Drive TEST low EX16 high PIODEC low and BCLK low
2 Drive each pin high except for the pins mentioned in the above discussion (TEST PIODEC and BCLK)
3 Starting at pin 168 (IO16 ) and continuing with pins 169 170 etc individually drive each pin low remem-
bering to toggle PIODEC from low to high when EX16 is toggled from high to low Also when PIODEC
is driven low EX16 must be driven high Expect EISAHLDA to toggle after each corresponding input pin is
toggled The final pin in the tree is pin 166 (LOCK ) BCLK is not part of the tree and EISAHLDA is
operated only as an output Also note that no-connect (NC) Vcc and Vxx pins are not part of the NAND
Tree
4 Turn off tester drivers before enabling the PCEB’s buffers (via PIODEC TEST and EX16 )
5 Reset the PCEB prior to proceeding with further testing
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