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82375EB Datasheet, PDF (47/131 Pages) Intel Corporation – PCI-EISA BRIDGE (PCEB)
82375EB SB
Bit
Description
15 2 BIOS Timer Base Address Bits 15 2 correspond to PCI address lines AD 15 2
1 Reserved
0 BIOS Timer Enable (BTE) When BTEe1 the BIOS Timer is enabled When BTEe0 the BIOS
Timer is disabled The default is 0 (disabled)
3 1 26 ELTCR EISA LATENCY TIMER CONTROL REGISTER
Address Offset
Default value
Attribute
Size
84h
7Fh
Read Write
8 bits
This register provides the control for the EISA Latency Timer (ELT) The register holds the initial count value
used by the ELT The ELT uses the PCI clock for counting The ELT time-out period is equal to
where
ELTtimeouteValue ELTCR(7 0) x Tpciclck ns
Tpciclke30 ns at 33 MHz (40 ns at 25 MHz)
Therefore a maximum ELT time-out period at 33 MHz is 256 x 30 ns e 7 68 ms The value written into this
register is system dependent It should be based on PCI latency characteristics controlled by the PCI Master
Latency Timer mechanism and on EISA Bus arbitration latency parametrics A typical value corresponds to
the ELT time-out period of 1–3 ms When the value in the ELTCR Register is 0 the ELT mechanism is
disabled The ELTCR Register must be initialized before EISA masters or DMA are enabled
Bit
Description
7 0 EISA Latency Timer Count Value Bits 7 0 contain the initial count value for the EISA Latency
Timer When this field contains 00h the EISA Latency Timer is disabled
3 2 I O Registers
The only PCEB internal resource mapped to the PCI I O space is the BIOS Timer Register
3 2 1 BIOSTM BIOS TIMER REGISTER
Register Location
Default Value
Attribute
Size
Programmable I O address location (Dword aligned)
00 00 xx xxh
Read Write
32 bits
This 32-bit register is mapped to the PCI I O space location determined by the value in the BTMR Register Bit
0 of BTMR must be 1 to enable access to the BIOS Timer The BIOS timer clock is derived from the EISA Bus
clock (BCLK) either 8 25 or 8 33 MHz depending on the PCI clock BCLK is divided by 8 to obtain the timer
clock of 1 03 or 1 04 MHz If a frequency other than 33 MHz or 25 MHz is used for PCI clock the BIOS Timer
clock will be affected (It will always keep the same relation to the BCLK i e 1 4 or 1 3 depending on the clock
divisor ) The BIOS Timer is only accessible from the PCI Bus and is not accessible from the EISA Bus
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