82375EB Datasheet, PDF (49/131 Pages) Intel Corporation – PCI-EISA BRIDGE (PCEB)

82375EB SB
Figure 2 Block Diagram of Address Decoder
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The PCEB provides three methods for decoding the current PCI Bus cycle The PCEB can use positive
subtractive or negative (82374SB only) decoding for these cycles depending on the type of cycle actions on
the PCI Bus and programming of the PCEB registers For EISA Bus cycles only positive decoding is used
1 Positive decoding With positive decoding the PCI EISA Bus cycle address is compared to the corre-
sponding address ranges set up in the PCEB for positive decode A match causes the PCEB decode logic to
immediately service the cycle The PCEB can be programmed (via the configuration registers) to positively
decode selected memory or I O accesses on both the PCI Bus and EISA Bus Depending on the program-
ming of the internal registers the PCEB provides positive decoding for PCI accesses to selected address
ranges in memory and I O spaces and for EISA accesses to selected address ranges in memory and I O
spaces Note that the decoding method for PCI accesses to the PCEB internal registers (configuration and
I O space registers) is not programmable and these accesses are always positively decoded
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