82375EB Datasheet, PDF (14/131 Pages) Intel Corporation – PCI-EISA BRIDGE (PCEB)

82375EB SB
2 0 SIGNAL DESCRIPTION
This section provides a detailed description of each signal The signals are arranged in functional groups
according to their associated interface
The ‘‘ ’’ symbol at the end of a signal name indicates that the active or asserted state occurs when the signal
is at a low voltage level When ‘‘ ’’ is not present after the signal name the signal is asserted when at the high
voltage level
The terms assertion and negation are used extensively This is done to avoid confusion when working with a
mixture of ‘‘active-low’’ and ‘‘active-high’’ signals The term assert or assertion indicates that a signal is
active independent of whether that level is represented by a high or low voltage The term negate or
negation indicates that a signal is inactive
The following notations are used to describe the signal type
in Input is a standard input-only signal
out Totem Pole output is a standard active driver
o d Open Drain input output
t s Tri-State is a bi-directional tri-state input output pin
sts
Sustained Tri-State is an active low tri-state signal owned and driven by one and only one agent at a
time The agent that drives a s t s pin low must drive it high for at least one clock before letting it float
A new agent can not start driving a s t s signal any sooner than one clock after the previous owner tri-
states it An external pull-up is required to sustain the inactive state until another agent drives it and
must be provided by the central resource
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