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82375EB Datasheet, PDF (38/131 Pages) Intel Corporation – PCI-EISA BRIDGE (PCEB) | |||
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82375EB SB
3 1 15 EADC1 EISA ADDRESS DECODE CONTROL 1 REGISTER
Address Offset
Default value
Attribute
Size
48 â 49h
0001h
Read Write
16 bits
This 16-bit register specifies EISA-to-PCI mapping of the 0-1 MByte memory address range For each bit
position the memory block is enabled if the corresponding bite1 and is disabled if the bite0 EISA or DMA
memory cycles to the enabled blocks result in the EISA cycle being forwarded to the PCI Bus For disabled
memory blocks the EISA memory cycle is not forwarded to the PCI Bus
Bit
Description
15 880â896 KBytes Memory Enable EISA-to-PCI mapping for this memory space is enabled when this
bit is 1 and disabled when this bit is 0
14 864â880 KBytes Memory Enable EISA-to-PCI mapping for this memory space is enabled when this
bit is 1 and disabled when this bit is 0
13 848â864 KBytes Memory Enable EISA-to-PCI mapping for this memory space is enabled when this
bit is 1 and disabled when this bit is 0
12 832â848 KBytes Memory Enable EISA-to-PCI mapping for this memory space is enabled when this
bit is 1 and disabled when this bit is 0
11 816â832 KBytes Memory Enable EISA-to-PCI mapping for this memory space is enabled when this
bit is 1 and disabled when this bit is 0
10 800â816 KBytes Memory Enable EISA-to-PCI mapping for this memory space is enabled when this
bit is 1 and disabled when this bit is 0
9 784â800 KBytes Memory Enable EISA-to-PCI mapping for this memory space is enabled when this
bit is 1 and disabled when this bit is 0
8 768â784 KBytes Memory Enable EISA-to-PCI mapping for this memory space is enabled when this
bit is 1 and disabled when this bit is 0
7 3 Reserved
2 640â768 KBytes VGA Memory Enable EISA-to-PCI mapping for this memory space is enabled
when this bit is 1 and disabled when this bit is 0
1 512â640 KBytes Memory Enable EISA-to-PCI mapping for this memory space is enabled when this
bit is 1 and disabled when this bit is 0
0 0â512 KBytes Memory Enable EISA-to-PCI mapping for this memory space is enabled when this bit
is 1 and disabled when this bit is 0
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