HYB18T256400AF Datasheet, PDF (66/90 Pages) Infineon Technologies AG – 256 Mbi t DDR2 SDRAM

HYB18T256400/800/160AF
256Mb DDR2 SDRAM
5.2.3 Differential DC and AC Input and Output Logic Levels
Symbol
Parameter
min.
max.
Units Notes
VIN(dc)
DC input signal voltage
-0.3
VDDQ + 0.3
1
VID(dc)
DC differential input voltage
0.25
VDDQ + 0.6
2
VID(ac)
AC differential input voltage
0.5
VDDQ + 0.6
V
3
VIX(ac)
AC differential cross point input voltage
0.5 * VDDQ - 0.175
0.5 * VDDQ + 0.175
V
4
VOX(ac)
AC differential cross point output voltage
0.5 * VDDQ - 0.125
0.5 * VDDQ + 0.125
V
5
notes:
1) VIN(dc) specifies the allowable DC execution of each input of differential pair such as CK, CK, DQS, DQS etc.
2) VID(dc) specifies the input differential voltage VTR - VCP required for switching. The minimum value is equal to VIH(dc) - VIL(dc).
3) VID(ac) specifies the input differential voltage VTR - VCP required for switching. The minimum value is equal to VIH(ac) - VIL(ac).
4) The value of VIX(ac) is expected to equal 0.5 x VDDQ of the transmitting device and VIX(ac) is expected to track variations in VDDQ.
VIX(ac) indicates the voltage at which differential input signals must cross.
5) The value of VOX(ac) is expected to equal 0.5 x VDDQ of the transmitting device and VOX(ac) is expected to track variations in
VDDQ. VOX(ac) indicates the voltage at which differential input signals must cross.
VTR
VID
VCP
Crossing Point
VDDQ
VIX or VOX
SSTL18_3
VSSQ
Page 66
Rev. 1.02 May 2004
INFINEON Technologies