HYB18T256400AF Datasheet, PDF (13/90 Pages) Infineon Technologies AG – 256 Mbi t DDR2 SDRAM

HYB18T256400/800/160AF
256Mb DDR2 SDRAM
2. Functional Description
2.1 Simplified State Diagram
Initialization
Sequence
Autorefreshing
tRFC
CKEL
REFSX _Selfrefresh
CKEL
PD_entry
Precharge PD
CKEH
Idle
REFS _MRS
setting MRS
or EMRS
tMRD
Activating
tRCD
WL + BL/2 + WR
Writing_AP
tRP
Precharging
RL + BL/2 + tRTP
Reading_AP
Write
Writing
Read
Reading
CKEL
Active PD
Write
PD_entry
Read
Bank Active
CKEH
Automatic Sequence
Command Sequence
This Simplified State Diagram is intended to provide a floorplan of the possible state transitions and the
commands to control them. In particular situations involving more than one bank, enabling / disabling on-die
termination, Power-Down entry / exit - among other things - are not captured in full detail.
Page 13
Rev. 1.02 May 2004
INFINEON Technologies