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PXF4336 Datasheet, PDF (413/425 Pages) Infineon Technologies AG – ABM Premium ATM Buf fer Manager
ABM-P
PXF 4336 V1.1
Electrical Characteristics
8.4.4 CPR SSRAM Interface
Timing of the Synchronous Static RAM Interfaces is simplified as all signals are refer-
enced to the rising edge of RAMCLK. In Figure 8-8, it can be seen that all signals output
by the ABM-P have identical delay times with reference to the clock. When reading from
the RAM, the ABM-P samples the data within a window at the rising clock edge.
RAMCLK
CPRADSC,
CPRADR(18:0),
CPRGW, CPROE
CPRDAT(19:0), input
CPRDAT(19:0), output
100
101 102
103
104 105
Figure 8-8 SSRAM Interface Generic Timing Diagram
Table 8-13 SSRAM Interface AC Timing Characteristics
No. Parameter
Limit Values
Min
Typ
Max
100 TRAMCLK: Period RAMCLK
16.7
100A FRAMCLK: Frequency RAMCLK
60
101 Setup time CPRADSC,
2.5
CPRADR(18:0), CPRGW, CPROE
before RAMCLK rising
102 Hold time CPRADSC, CPRADR(18:0), 1.5
CPRGW, CPROE after RAMCLK rising
103 Delay CPRDAT Output after RAMCLK 2.5
11
rising
104 Setup time CPRDAT Input before CLK 2.5
rising (Read cycles)
105 Hold time CPRDAT Input after CLK ris- 1.5
ing (Read cycles)
Unit
ns
MHz
ns
ns
ns
ns
ns
Data Sheet
413
2001-12-17