PXF4336 Datasheet, PDF (300/425 Pages) Infineon Technologies AG – ABM Premium ATM Buf fer Manager

ABM-P
PXF 4336 V1.1
Register Description
Internal Table 9: Queue Parameter Table 2 Transfer Registers
Queue Parameter Table Transfer Registers are used to access the internal Upstream
and Downstream Queue Parameter Table 2 (QPT2) containing 8192 entries each. In
both Table 7-21 and Table 7-22 provide an overview of the registers involved. Each
QPT2 entry consists of 64 bits.
Table 7-21 Registers for QPT2 Upstream Table Access
63
0
QPT2 RAM entry (Upstream)
RAM Select:
15
0 15
0 15
0 15
0 15
0
UQPT2T3
UQPT2T2
UQPT2T1
UQPT2T0
MAR=11_H
Entry Select:
15
0 15
0 15
0 15
0 15
0
UQPTM3
UQPTM2
UQPTM1
UQPTM0
WAR (0..8191_D)
•
Table 7-22 Registers for QPT2 Downstream Table Access
63
0
QPT2 RAM entry (Downstream)
15
0 15
0 15
0 15
0
DQPT2T3
DQPT2T2
DQPT2T1
DQPT2T0
15
0 15
0 15
0 15
0
DQPTM3
DQPTM2
DQPTM1
DQPTM0
RAM Select:
15
0
MAR=19_H
Entry Select:
15
0
WAR (0..8191_D)
UQPT2T0..UQPT2T3 are the transfer registers for the 64-bit entry of the upstream QPT2
table. DQPT2T0..DQPT2T3 are the transfer registers for the 64-bit entry of the
downstream QPT2 table. Access to the RAM entry is controlled by mask registers
UQPTM0..UQPTM3 and DQPTM0..DQPTM3, respectively. The Mask registers are
shared for access to both tables QPT1 and QPT2 whereas the transfer registers are
unique for each table.
The queue number representing the table entry which needs to be read or written must
be written to the Word Address Register (WAR). The dedicated QPT2 table entry is read
into the xQPT2T0..xQPT2T3 transfer registers (x=U,D) or modified by the
xQPT2T0..xQPT2T3 transfer register values with a write mechanism. The associated
mask registers xQPTM0..xQPTM3 allow a bit-wise Write operation (0 - unmasked, 1 -
Data Sheet
300
2001-12-17