PXF4336 Datasheet, PDF (263/425 Pages) Infineon Technologies AG – ABM Premium ATM Buf fer Manager

QIDvalid
ABM-P
PXF 4336 V1.1
Register Description
Queue Enable:
0
Queue disabled.
An attempt to store a cell to a disabled queue leads to
discard of the cell and a QIDINV interrupt is generated.
If a filled queue gets disabled, cells may still be in the
queue. In this case the disabled queue is still scheduled,
and cells are logically emitted from the queue but will not
be transmitted.
Actual filling of the queue can be obtained via
QueueLength(13:0) parameter in the QCT entry.
Note: To disable an active VC-merge group, bit
’QIDvalid must be reset. Deactivating the queue
by setting QIDvalid=’0’ automatically starts an
internal process to delete the queue from the VC-
merge group. In response to resetting ’QIDvalid’
the ABM-P will generate an interrupt (Bit
’UQVCMGD/DQVCMGD’ in Register 117: ISRC)
and reset bit ’MGconf/DQsch’ in this table.
1
Queue enabled.
Cells are allowed to enter the queue.
TCID(3:0)
Traffic Class Number (0..15)
Assigns the queue to one of the 16 traffic classes defined in the
traffic class table TCT for this core.
SBID(6:0)
Scheduler Block Number (0..127)
Assigns the queue to one of the 128 schedulers of this core.
ABRdir
ABR CI/NI update of backward RM cells:
0
RM cells of the same core are updated.
1
RM cells of the opposite core are updated.
Note: ABR Congestion Indication is done in RM cells of the backward ABR connection.
In Bi-directional Mode, these cells are handled by the opposite core (therefore
ABRdir must be 1 for each ABR QID). In Mini-switch Mode, these cells can be
handled from the same or opposite core depending on configuration. (If only one
core will be used, ABRdir must be 0 for each ABR QID.)
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Data Sheet
263
2001-12-17