PXF4336 Datasheet, PDF (366/425 Pages) Infineon Technologies AG – ABM Premium ATM Buf fer Manager

Register 121 ISRDBA
Interrupt Status Register DBA
ABM-P
PXF 4336 V1.1
Register Description
CPU Accessibility:
Reset Value:
Offset Address:
Typical Usage:
Read/Write
0000_H
ISRDBA
E9_H
Read by CPU to evaluate interrupt events related to both
cores. Reset by read.
Bit
15
14
13
12
11
10
9
8
DBATC(15:8)
Bit
7
6
5
4
3
2
1
0
DBATC(7:0)
DBATC(15:0)
Each bit position indicates that a DBA Threshold Crossing Event
occurred in the respective entry i of the DBA Threshold Crossing
Table (see Register DTCT).
Data Sheet
366
2001-12-17