PXF4336 Datasheet, PDF (30/425 Pages) Infineon Technologies AG – ABM Premium ATM Buf fer Manager

ABM-P
PXF 4336 V1.1
Pin Descriptions
Table 2-1 Ball Definitions and Functions (cont’d)
Ball Symbol
No.
Type Function
M26
ERCCLKSEL I_PD
Internal Alternative ERC Clock Source Select:
’H’: ERC unit alternative clock is supplied by signal
‘ERCCLK’.
’L’: ERC unit alternative clock is supplied by
DPLL2.
L24
ERCFREQSE I_PD
L
Internal ERC Clock Source Select:
’H’: Asynchronous ERC Operation
ERC unit clock is supplied by signal ‘ERCCLK’ or
DPLL2.
’L’: Synchronous ERC Operation
ERC unit clock is supplied by internal core clock
(signal ‘SYSCLK’ or DPLL1).
D21 RAMCLK
O
Reference clock for external RAM (CSRU, CSRD
and CPR)
2.3.2
G4,
G3,
G2,
G1,
F4,
F3,
F2,
F1,
E4,
E3,
E2,
E1,
D2,
D1,
C2,
C1
A1
UTOPIA Receive Interface Upstream (Master/Slave) (32 pins)
15,
I
UTOPIA Receive Data Bus Upstream
14,
(from PHY)
13,
12,
11,
10,
9,
8,
7,
6,
5,
4,
3,
2,
1,
0
URXPRTYU I_PD
UTOPIA Receive Odd Parity of URXDATU(15:0)
(PHY side)
Data Sheet
30
2001-12-17