PXF4336 Datasheet, PDF (244/425 Pages) Infineon Technologies AG – ABM Premium ATM Buf fer Manager

Register 39 TCT0
TCT Transfer Register 0
ABM-P
PXF 4336 V1.1
Register Description
CPU Accessibility:
Reset Value:
Offset Address:
Typical Usage:
Read/Write
0000_H
TCT0
3E_H
Written and Read by CPU to maintain the TCT table;
the meaning of register TCT0 depends on the bit field
’Word64Sel’ in WAR;
Register WAR.Word64Sel(1:0) =’00’:
Bit
15
14
13
12
11
10
9
8
BufMaxNg(7:0)
Bit
7
6
5
4
3
2
1
0
BufEPDNg(7:0)
BufMaxNg(7:0)
Maximum Buffer Fill Threshold for a non-real-time traffic class
configuration (register TCT1, DwordSel=00).
The first cell exceeding this threshold is discarded and if also PPD
is enabled for this traffic class (register TCT1, DwordSel=00,
PPDen=1) PPD is applied on a per connection (LCI) basis.
The threshold is defined with a granularity of 1024 cells:
Threshold = BufMaxNg(7:0) * 1024 Cells
BufEPDNg(7:0)
EPD threshold for a non-real-time traffic class configuration
(register TCT1, DwordSel=’00’).
If the buffer fill exceeds this threshold and EPD is enabled for this
traffic class (register TCT1, DwordSel=00, EPDen=1) EPD is
applied on a per connection (LCI) basis.
The threshold is defined with a granularity of 1024 cells:
Threshold = BufEPDNg(7:0) * 1024Cells
Data Sheet
244
2001-12-17