PXF4336 Datasheet, PDF (247/425 Pages) Infineon Technologies AG – ABM Premium ATM Buf fer Manager

Register 40 TCT1
TCT Transfer Register 1
ABM-P
PXF 4336 V1.1
Register Description
CPU Accessibility:
Reset Value:
Offset Address:
Typical Usage:
Read/Write
0000_H
TCT1
3F_H
Written and Read by CPU to maintain the TCT table;
the meaning of register TCT1 depends on the bit field
’Word64Sel’ in WAR;
Register WAR.Word64Sel(1:0) =’00’:
Bit
15
14
13
12
11
10
9
8
unused(7:0)
Bit
7
6
5
4
3
2
1
0
BufCiCLP1(17:10)
BufCiCLP1
(17:10)
Buffer EPD CLP1 Threshold
This 8-bit value determines a global cell filling level threshold with a
granularity of 1024 cells that triggers early packet discard (EPD) for
CLP=1 tagged frames used by GFR traffic class service (low
watermark).
The threshold values are compared with the non guaranteed Buffer
Occupancy counters UBufferOccNg, DBufferOccNg respectively.
The CPU programs the threshold with a granularity of 1024 cells by
right shifting the value by 10:
BufCiCLP1(17:10):= (threshold_value(17:0) >> 10)
Note: In ABM v1.1 this threshold was determined by registers UEC
and DEC.
Data Sheet
247
2001-12-17