PXF4336 Datasheet, PDF (287/425 Pages) Infineon Technologies AG – ABM Premium ATM Buf fer Manager

Register 62 QCIT
QCIT Transfer Register
ABM-P
PXF 4336 V1.1
Register Description
CPU Accessibility:
Reset Value:
Offset Address:
Typical Usage:
Read/Write
0000_H
QCIT
5C_H
Written by CPU
Bit
15
14
13
12
11
10
9
8
Unused(3:0)
QCITH(11:8)
Bit
7
6
5
4
3
2
1
0
QCITH(7:0)
QCITH(11:0)
Queue Congestion Indication Threshold
This threshold determines the number of cells stored in the
dedicated queue to set the associated congestion indication bit in
the bit pattern of the QCI Interface. The threshold value is
programmed with a granularity of 4 cells.
The CPU programs the threshold with a granularity of 4 cells by
right shifting the value by 2:
QCITH(11:0):= threshold >> 2
Note: Reset of the congestion indication is performed with a
hysteresis. The hysteresis value is common to all congestion
indication thresholds, but evaluated queue threshold specific.
Register 30: DQCIC provides the details.
Data Sheet
287
2001-12-17