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PXF4336 Datasheet, PDF (311/425 Pages) Infineon Technologies AG – ABM Premium ATM Buf fer Manager
ABM-P
PXF 4336 V1.1
Register Description
The UTOPIA port number can be modified during operation; (port) switch-over is
e.g. used for ATM protection switching. The following Notes explain switch-over and
rate adaptation during operation:
Note: This SCTI table entry should be programmed during Scheduler Block
configuration/initialization. However the UTOPIA port number value can be
modified during operation (e.g. for port switching). In this case the Init(9:0) value
can be reset to 0. This bit field contains a 4-bit counter incrementing the number
of unused scheduler cell cycles. Unused cell cycles occur whenever a scheduled
event cannot be served, because a previously generated event is still in service
(active cell transfer at UTOPIA Interface). This counter value is used (and
decremented accordingly) to determine the allowed cell burst size for following
scheduler events. Such bursts are treated as ’one event’ to allow a near 100%
scheduler rate utilization. The maximum burst size is programmed in registers
UECRI/DECRI on page 7-312.
Thus, overwriting bit field Init(9:0) with 0 during operation may invalidate some
stored cell cycles, only if maximum burst size is programmed >1 for this port.
Only saved scheduler cell cycles can get lost; in no way can stored cells be lost
or discarded by these operations.
To minimize even this small impact, value Init(9:0) can be read and written back
with the new UTOPIA port number.
Note: Recommendation for changing the UTOPIA port number or scheduler rate
during operation:
Disable specific scheduler by read-modify-write operation to corresponding bit in
registers USCEN0/DSCEN0... USCEN7/DSCEN7.
Modify scheduler specific UTOPIA port number and rates via Table 10
"Scheduler Configuration Table Integer Transfer Registers" on Page 306,
registers USCTI/DSCTI and Table 11 "Scheduler Configuration Table
Fractional Transfer Registers" on Page 316, registers USCTFT/DSCTFT.
Enable specific scheduler by read-modify-write operation to corresponding bit in
registers USCEN0/DSCEN0... USCEN7/DSCEN7.
Data Sheet
311
2001-12-17