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TC290 Datasheet, PDF (382/476 Pages) Infineon Technologies AG – 32-Bit Single-Chip Micocontroller
3.15
Reset Timing
TC290 / TC297 / TC298 / TC299 BB-Step
Electrical SpecificationReset Timing
Table 3-35 Reset Timings
Parameter
Symbol
Values
Unit Note / Test Condition
Application Reset Boot Time 1) tB CC
Min.
-
Typ.
-
Max.
350 2)
µs
operating with max.
frequencies.
System Reset Boot Time
tBS CC
-
-
1
ms
Power on Reset Boot Time 3) tBP CC
-
-
2.5 2)
ms dV/dT=1V/ms.
including EVR ramp-
up and Firmware
execution time
-
-
1.11 2)
ms
Firmware execution
time; without EVR
operation (external
supply only)
Minimum PORST hold time tEVRPOR CC 10
-
-
µs
incase of power fail event
issued by EVR primary monitor
EVR start-up or ramp-up time tEVRstartup -
-
1
ms dV/dT=1V/ms. EVR13
CC
and EVR33 active
Minimum PORST active hold tPOA CC
1
-
-
ms
time after power supplies are
stable at operating levels 4)
Configurable PORST digital tPORSTDF CC 600
-
filter delay in addition to analog
pad filter delay
1200
ns
HWCFG pins hold time from tHDH CC
16 / fSPB -
-
ns
ESR0 rising edge
HWCFG pins setup time to
tHDS CC
0
-
-
ns
ESR0 rising edge
Ports inactive after ESR0 reset tPI CC
-
-
8/fSPB
ns
active
Ports inactive after PORST tPIP CC
-
-
150
ns
reset active 5)
Hold time from PORST rising tPOH SR
150
-
-
ns
edge
Setup time to PORST rising tPOS SR
0
-
-
ns
edge
1) The duration of the boot time is defined between the rising edge of the internal application reset and the clock cycle when
the first user instruction has entered the CPU pipeline and its processing starts.
2) The timing values assumes programmed BMI with ESR0CNT inactive.
3) The duration of the boot time is defined by all external supply voltages are inside there operation condictions and the clock
cycle when the first user instruction has entered the CPU pipeline and its processing starts.
Data Sheet
3-376
V 1.1 2015-05
TC290/TC297/TC298/TC299 BB-Step Data Sheet downloaded by saravanakumar maniyam (larsen and Toubro limited) at 08 Sep 2015 08:06