PXB4219 Datasheet, PDF (282/290 Pages) Infineon Technologies AG – IWE8 Interworking Element for 8 E1/T1 Lines

.
ATM SDU
of 1st cell
PXB4219 / PXB4220 / PXB4221
Appendix
AAL1 header octet
AAL structure pointer = 0
tim eslot x
tim eslot y
tim eslot z
tim eslot x
tim eslot y
tim eslot z
1st frame
2nd fram e
ATM SDU
of 2nd cell
tim eslot x
tim eslot y
tim eslot z
tim eslot x
AAL1 header octet
tim eslot y
tim eslot z
ABCD timeslot x
ABCD tim eslot y
ABCD timeslot z
unused=0000
tim eslot x
tim eslot y
tim eslot z
tim eslot x
tim eslot y
tim eslot z
tim eslot x
1st
m ulti-
15th fram e ^{fram e}
16th fram e
signalling
sub-
structure
1st frame
14th fram e
2nd
m ulti-
fram e
Figure 78 Example Multiframe Structure for 3x64 Kbit/s E1 with CAS
12.4.2 DS1
An DS1 multiframe consists of 24 frames. They are numbered from 1 to 24. In the
multiframe there are four different signalling bits (A, B, C and D) providing four
independent 333 bit/s channels, two independent 667 bit/s channels or one 1333 bit/s
channel. The four signalling bits for each time slot are transported in the last bit of each
time slot of the frames 6, 12, 18, 24. In these frames only 7 bits are available for data
transmission (Robbed Bit Signalling). When mapping DS1 Nx64 Kbit/s frames into ATM
cells the CAS bits may also be transmitted in the payload section. However, only the
signalling bits of the CAS substructure are relevant.
Data Sheet
282
2002-05-06