PXB4219 Datasheet, PDF (152/290 Pages) Infineon Technologies AG – IWE8 Interworking Element for 8 E1/T1 Lines

p_atm
p_ces
p_acm
p_srts
p_slp
p_ulp
p_dlp
p_rx_act
PXB4219 / PXB4220 / PXB4221
Register Description
1 = Enabled
Port ATM mode
0 = AAL (CES) mode port
1 = ATM (PHY) mode port
Port circuit emulation service
X = When p_atm = 1
0 = Structured (N × 64 kbit/s)
1 = Unstructured
Port ACM enable
X = When p_atm = 1
0 = Disabled
1 = Enabled
Port SRTS enable
For the PXB4220 this bit enables SRTS clock recovery. This is only
useful for AAL ports in unstructured CES.
For the PXB4221 this bit is tied to "0". Writing "1" has no effect.
X = When p_atm = 1
0 = Disabled
1 = Enabled
Port serial loopback enable
0 = Disabled
1 = Enabled
Port upstream UTOPIA loopback (works even if UTOPIA interface is
disabled)
0 = Disabled
1 = Enabled
Port downstream UTOPIA loopback
0 = Disabled
1 = Enabled
Port receive activate
0 = Disabled
1 = Enabled
Data Sheet
152
2002-05-06