PXB4219 Datasheet, PDF (249/290 Pages) Infineon Technologies AG – IWE8 Interworking Element for 8 E1/T1 Lines

PXB4219 / PXB4220 / PXB4221
Electrical Characteristics
Table 35 Framer Receive Interface Timing in FAM
No. Parameter
Limit Values
Unit
1
T_RFCLK: Period RFCLK ¹⁾
1A
F_RFCLK: Frequency RFCLK ¹⁾
2
T_FRCLK: Period FRCLK
Min
- 130
ppm
Typ
30,518
32,768
122
Max
+130
ppm
ns
MHz
ns
2A F_FRCLK: Frequency FRCLK
- 130
ppm
8,192
+130
ppm
MHz
3
Delay FRCLK falling to FRFRS
3
32
ns
4
Setup time FRDAT before FRCLK
15
ns
falling (center of bit period)
5
Hold time FRDAT after FRCLK falling 15
ns
(center of bit period)
6
Setup time FRMFB before FRCLK
15
ns
falling (center of bit period)
7
Hold time FRMFB after FRCLK falling 15
ns
(center of bit period)
1) _{In case the Internal Clock Recovery Circuit is used for SRTS, the frequency deviation should be +/- 10 ppm}
Data Sheet
249
2002-05-06