PXB4219 Datasheet, PDF (149/290 Pages) Infineon Technologies AG – IWE8 Interworking Element for 8 E1/T1 Lines

PXB4219 / PXB4220 / PXB4221
Register Description
Table 32 Internal Registers
MPADR
Width Name
00021_H
16
00022_H
16
00023_H
16
00024_H
12
00025_H
5
00026_H
8
00027_H
16
00028_H
14
00029_H
16
0002A_H
16
0002B_H
4
0002C_H
16
0002D_H
16
0002E_H
16
0002F_H
16
00030_H
16
00031_H
16
00032_H- 00100_H
00101_H
11
00102_H
11
00103_H
9
00104_H+ N x 32 13
00105_H+ N x 32 7
00106_H+ N x 32 7
00107_H+ N x 32 5
00108_H+ N x 32 1
0010C_H+ N x 32 14
0010D_H+ N x 32 4
0010E_H+ N x 32 13
0010F_H+ N x 32 12
00110_H
12
00111_H
12
cfvm1
cfvp2
cfvm2
cfpt
cmd
cfrp
thrshld
utconf
cas1
cas2
cas3
thrshp01
thrshp23
thrshp45
thrshp67
eis0
lcdtimer
irs
irm
icrcconf
condN
irsN
irmN
tsinN
conuN
avbN
asfN
tiniN
treshN
per
scri
Register
Cell Filter VCI Mask Register 1
Cell Filter VCI Pattern Register 2
Cell Filter VCI Mask Register 2
Cell Filter Payload Type Register
Command Register
Cell Filter Read Pointer
Threshold Register
UTOPIA Configuration Register
CAS 1 Register
CAS 2 Register
CAS 3 Register
Threshold Register Ports 0 and 1
Threshold Register Ports 2 and 3
Threshold Register Ports 4 and 5
Threshold Register Ports 6 and 7
Extended Interrupt Status Register 0
LCD Timer Register
Unused
Interrupt Source Register
Interrupt Mask Register
ICRC Configuration Register
Configuration Downstream Register of Port N
Interrupt Source of Port N
Interrupt Mask of Port N
Test input Register of Port N
Configuration Upstream Register of Port N
Average Buffer Filling of Port N
ACM Shift Factor of Port N
Time of Initial Free Run of Port N
Threshold Out Of Lock Detection of Port N
Parity Errors at Clock Recovery Interface
Synchronization Errors at Clock Recovery
Interface
Data Sheet
149
2002-05-06