PXB4219 Datasheet, PDF (124/290 Pages) Infineon Technologies AG – IWE8 Interworking Element for 8 E1/T1 Lines

band_width[3:0]
PXB4219 / PXB4220 / PXB4221
Memory Structure
sdt channel_mode[1:0] ref_slot
=1
next_slot_nr Next slot number
If band_width > 0 next_slot_nr points to the next slot of this channel.
If band_width = 0 and CAS is activated next_slot_nr[3:0] will be used as
signalling conditioning nibbles.
If band_width = 0 and CAS is not activated next_slot_nr is don’t care.
sdt_mfs
SDT multiframe pulse select
X = If [aal0] = 1 or [sdt] = 0 or pcfN[p_ces] = 1
0 = Start of structure is frame pulse
1 = Start of structure is multiframe pulse as defined by
pcfN[p_tx_mfs]
sig_cond Signalling conditioning upstream
0 = CAS freezing upstream enabled in "loss of signal" condition
1 = CAS conditioning upstream enabled in "loss of signal" condition
srts
SRTS enable
Enables RTS value insertion into AAL1 SAR-PDUs
X = If pcfN[p_srts] = 0 or [aal0] = 1
0 = Disabled
1 = Enabled
subst_
bpslct
Substitute byte-pattern select
00 = Select byte-pattern 0, defined in bp10[bp0]
01 = Select byte-pattern 1, defined in bp10[bp1]
10 = Select byte-pattern 2, defined in bp32[bp2]
11 = Select byte-pattern 3, defined in bp32[bp3]
dcor
Decorrelation circuit enable
0 = Disabled
1 = Enabled
dcor_
Decorrelation random Number
random_nr
X = if [dcor] = 0
aal0
AAL0 enable
Data Sheet
124
2002-05-06