PXB4219 Datasheet, PDF (108/290 Pages) Infineon Technologies AG – IWE8 Interworking Element for 8 E1/T1 Lines

PXB4219 / PXB4220 / PXB4221
Interface Description
In case it is configured for UTOPIA level 2 MPHY mode, the amount of implemented PHY
ports can be selected via the associated address range (“utconf[utrange]” with
utconf[mapping_mode] = 0).
In addition, the transmission of the UTOPIA port number via a user-defined field in the
ATM header enables multi PHY operation even in UTOPIA level 1 mode and UTOPIA
level 2 single PHY mode as described in Chapter 5.2.3.
In UTOPIA level 2 MPHY mode no port number mapping into the ATM header is done.
However, using this feature in UTOPIA level 2 mode, will give access to all PHY ports
while the UTOPIA interface block is running in single PHY mode. For UTOPIA level 2
compliant multi PHY operation, “mapping_mode” should be reset. In this case the UDF
field is set to all zero.
In UTOPIA level 2 MPHY mode the port number is transported via the address pins.
“utbaseadr” in “utconf” defines the base address under which the ports will be
accessible. In UTOPIA level 1 mode, “utbaseadr” has to be set to "0" otherwise cells are
discarded.
If the device is in single PHY mode, it will react on the address, written into “utbaseadr”.
In multi PHY mode, the device will be accessible inside a window from “utbaseadr” to
“utbaseadr” + “utrange”. Where the nth port can be accessed at “utbaseadr” + n.
5.2.2 Back Pressure/ATM Cell Discarding
Backpressure describes the mechanism that controls the TXCLAV signal in UTOPIA
PHY mode. IWE8 supports two kinds of backpressure mechanisms, a general and a port
specific one.
Cells that are destined to inactive ports or channels are generally discarded.
5.2.2.1 General Backpressure Mechanism
The general backpressure mechanism depends only on the filling level of the 4 cell
UTOPIA input buffer.
General backpressure is active in all UTOPIA configurations:
• UTOPIA level 1compliant mode (utlevel=1)
• UTOPIA level 2 PHY mode, where the selection between ports is done by ATM
header fields (mapping_mode!=0)
• UTOPIA level 2 PHY mode, with port selection by ATM header fields disabled
(mapping_mode=0) and the port threshold mode (“p_thr_m” bits in “pcfN”) disabled.
The general threshold is defined in the “Threshold Register” (“thrshld”, see
Chapter 7.33).
Data Sheet
108
2002-05-06