PXB4219 Datasheet, PDF (189/290 Pages) Infineon Technologies AG – IWE8 Interworking Element for 8 E1/T1 Lines

PXB4219 / PXB4220 / PXB4221
Register Description
7.34
UTOPIA Configuration Register (utconf)
Read/write Address 00028_H
Reset value 0001_H
15
Not used
7
utbaseadr[2:0]
8
utrange[2:0]
utprtyen utbaseadr[4:3]
0
utlevel utmaster
mapping_mode[2:0]
utrange
utprtyen
utbaseadr
utlevel
utmaster
UTOPIA Port Range
Controls the supported port range if the device is configured as UTOPIA
level 2 PHY-Layer (utlevel=0, utmaster=0, mapping_mode=000_B)
000 = Ports 0 to 7 enabled
001 = Port 0 enabled
010 = Ports 0 and 1 enabled
011 = Ports 0 to 2 enabled
100 = Ports 0 to 3 enabled
101 = Ports 0 to 4 enabled
110 = Ports 0 to 5 enabled
111 = Ports 0 to 6 enabled
UTOPIA parity check enable
0 = Disabled
1 = Enabled
UTOPIA base address
Defines the base address under which the PHY-Layer is accessible.
Set to 0 if device utlevel = 1.
UTOPIA interface level
In Master mode only UTOPIA level 1 is available.
0 = UTOPIA level 2
1 = UTOPIA level 1
UTOPIA Slave/Master configuration
0 = Slave mode (PHY-Layer)
1 = Master mode (ATM-Layer)
Data Sheet
189
2002-05-06