MC9S12XD256CAL Datasheet, PDF (752/1348 Pages) Freescale Semiconductor, Inc – This specification describes the function of the clocks and reset generator (CRG).

Chapter 20 S12X Debug (S12XDBGV3) Module
TRANGE
00
01
10
11
Table 20-10. TRANGE Trace Range Encoding
Tracing Range
Trace from all addresses (No filter)
Trace only in address range from $00000 to Comparator D
Trace only in address range from Comparator C to $7FFFFF
Trace only in range from Comparator C to Comparator D
Table 20-11. TRCMOD Trace Mode Bit Encoding
TRCMOD
00
01
10
11
Description
Normal
Loop1
Detail
Pure PC
TALIGN
00
01
10
11
Table 20-12. TALIGN Trace Alignment Encoding
Description
Trigger at end of stored data
Trigger before storing data
Trace buffer entries before and after trigger
Reserved
MC9S12XDP512 Data Sheet, Rev. 2.21
754
Freescale Semiconductor