MC9S12XD256CAL Datasheet, PDF (1281/1348 Pages) Freescale Semiconductor, Inc – This specification describes the function of the clocks and reset generator (CRG).

Appendix A Electrical Characteristics
Table A-29. Example 1b: Normal Expanded Mode Timing V_DD35 = 5.0 V (EWAITE = 1)
No. C
Characteristic
Symbol
2 Stretch
Cycles
Min
Max
3 Stretch
Cycles
Min Max
— — Frequency of internal bus
— — Internal cycle time
— — Frequency of external bus
— — External cycle time (selected by EXSTR)
1 — External cycle time (EXSTR+1EWAIT)
2 D _Address¹ _{valid to RE fall}
3 D _{Pulse width, RE} ²
4 D _Address¹ _{valid to WE fall}
5 D _{Pulse width, WE}²
D Read data setup time (if ITHRS = 0)
6
D Read data setup time (if ITHRS = 1)
7 D Read data hold time
8 D Read enable access time
9 D Write data valid to WE fall
10 D Write data setup time
11 D Write data hold time
12 D Address to EWAIT fall
13 D Address to EWAIT rise
1 _{Includes the following signals: ADDRx, UDS, LDS, and CSx.}
2 _{Affected by EWAIT.}
f_i
t_cyc
f_o
t_cyce
t_cycew
t_ADRE
PW_RE
t_ADWE
PW_WE
t_DSR
t_DSR
t_DHR
t_ACCR
t_WDWE
t_DSW
t_DHW
t_ADWF
t_ADWR
D.C.
25
D.C.
75
100
5
85
5
73
24
28
0
71
7
81
8
0
37
40.0
∞
13.3
∞
∞
—
—
—
—
—
—
—
—
—
—
—
20
47
D.C.
25
D.C.
100
125
5
110
5
98
24
28
0
86
7
106
8
0
62
40.0
∞
10.0
∞
∞
—
—
—
—
—
—
—
—
—
—
—
45
72
Unit
MHz
ns
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Freescale Semiconductor
MC9S12XDP512 Data Sheet, Rev. 2.21
1283