MC9S12XD256CAL Datasheet, PDF(393/1348 Page) Freescale Semiconductor, Inc – This specification describes the function of the clocks and reset generator (CRG).

English

English German Russian Spanish Italian Polish Chinese Japanese Korean French Portuguese	Language :

MC9S12XD256CAL Datasheet, PDF (393/1348 Pages) Freescale Semiconductor, Inc – This specification describes the function of the clocks and reset generator (CRG).

◁

Chapter 8 Pulse-Width Modulator (S12PWM8B8CV1)

8.6 Interrupts

The PWM module has only one interrupt which is generated at the time of emergency shutdown, if the

corresponding enable bit (PWMIE) is set. This bit is the enable for the interrupt. The interrupt ï¬ag PWMIF

is set whenever the input level of the PWM7 channel changes while PWM7ENA = 1 or when PWMENA

is being asserted while the level at PWM7 is active.

In stop mode or wait mode (with the PSWAI bit set), the emergency shutdown feature will drive the PWM

outputs to their shutdown output levels but the PWMIF ï¬ag will not be set.

A description of the registers involved and affected due to this interrupt is explained in Section 8.3.2.15,

âPWM Shutdown Register (PWMSDN)â.

The PWM block only generates the interrupt and does not service it. The interrupt signal name is PWM

interrupt signal.

MC9S12XDP512 Data Sheet, Rev. 2.21

Freescale Semiconductor

393

▷