MC9S12XD256CAL Datasheet, PDF (222/1348 Pages) Freescale Semiconductor, Inc – This specification describes the function of the clocks and reset generator (CRG).

Chapter 6 XGATE (S12XGATEV2)
ANDL
Logical AND Immediate 8 bit Constant
(Low Byte)
ANDL
Operation
RD.L & IMM8 ⇒ RD.L
Performs a bit wise logical AND between the low byte of register RD and an immediate 8 bit constant and
stores the result in the destination register RD.L. The high byte of RD is not affected.
CCR Effects
NZVC
∆∆0—
N: Set if bit 7 of the result is set; cleared otherwise.
Z: Set if the 8 bit result is $00; cleared otherwise.
V: 0; cleared.
C: Not affected.
Code and CPU Cycles
Source Form
ANDL RD, #IMM8
Address
Mode
IMM8
10000
Machine Code
RD
IMM8
Cycles
P
MC9S12XDP512 Data Sheet, Rev. 2.21
222
Freescale Semiconductor