MC9S12XD256CAL Datasheet, PDF (561/1348 Pages) Freescale Semiconductor, Inc – This specification describes the function of the clocks and reset generator (CRG).

Chapter 14 Voltage Regulator (S12VREG3V3V5)
14.3.2.4 Autonomous Periodical Interrupt Trimming Register (VREGAPITR)
The VREGAPITR register allows to trim the API timeout period.
7
6
5
4
3
2
1
0
R
0
0
APITR5
APITR4
APITR3
APITR2
APITR1
APITR0
W
Reset
0¹
0¹
0¹
0¹
0¹
0¹
0
0
1. Reset value is either 0 or preset by factory. See Device User Guide for details.
= Unimplemented or Reserved
Figure 14-5. Autonomous Periodical Interrupt Trimming Register (VREGAPITR)
Table 14-5. VREGAPITR Field Descriptions
Field
Description
7–2
Autonomous Periodical Interrupt Period Trimming Bits — See Table 14-6 for trimming effects.
APITR[5:0]
Table 14-6. Trimming Effect of APIT
Bit
APITR[5]
APITR[4]
APITR[3]
APITR[2]
APITR[1]
APITR[0]
Trimming Effect
Increases period
Decreases period less than APITR[5] increased it
Decreases period less than APITR[4]
Decreases period less than APITR[3]
Decreases period less than APITR[2]
Decreases period less than APITR[1]
MC9S12XDP512 Data Sheet, Rev. 2.21
Freescale Semiconductor
561