MC9S12XD256CAL Datasheet, PDF (1047/1348 Pages) Freescale Semiconductor, Inc – This specification describes the function of the clocks and reset generator (CRG).

Chapter 25 2 Kbyte EEPROM Module (S12XEETX2KV1)
25.3.2.7 EEPROM Command Register (ECMD)
The ECMD register is the EEPROM command register.
7
6
5
4
3
2
1
0
R
0
W
CMDB
Reset
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 25-11. EEPROM Command Register (ECMD)
All CMDB bits are readable and writable during a command write sequence while bit 7 reads 0 and is not
writable.
Table 25-7. ECMD Field Descriptions
Field
Description
6:0
EEPROM Command Bits — Valid EEPROM commands are shown in Table 25-8. Writing any command other
CMDB[6:0] than those listed in Table 25-8 sets the ACCERR flag in the ESTAT register.
Table 25-8. Valid EEPROM Command List
CMDB[6:0]
0x05
0x20
0x40
0x41
0x47
0x60
Command
Erase Verify
Word Program
Sector Erase
Mass Erase
Sector Erase Abort
Sector Modify
25.3.2.8 RESERVED3
This register is reserved for factory testing and is not accessible.
7
6
5
4
3
2
1
0
R
0
0
0
0
0
0
0
0
W
Reset
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 25-12. RESERVED3
All bits read 0 and are not writable.
EEPROM Address Registers (EADDR)
Freescale Semiconductor
MC9S12XDP512 Data Sheet, Rev. 2.21
1049