MC9S12XD256CAL Datasheet, PDF (1278/1348 Pages) Freescale Semiconductor, Inc – This specification describes the function of the clocks and reset generator (CRG).

Appendix A Electrical Characteristics
Table A-28. Example 1a: Normal Expanded Mode Timing V_DD35 = 5.0 V (EWAITE = 0)
No. C
Characteristic
— — Frequency of internal bus
— — Internal cycle time
— — Frequency of external bus
1 — External cycle time (selected by EXSTR)
2 D Address¹ valid to RE fall
3 D Pulse width, RE
4 D Address¹ valid to WE fall
5 D Pulse width, WE
6 D Read data setup time (if ITHRS = 0)
D Read data setup time (if ITHRS = 1)
7 D Read data hold time
8 D Read enable access time
9 D Write data valid to WE fall
10 D Write data setup time
11 D Write data hold time
1 _{Includes the following signals: ADDRx, UDS, LDS, and CSx.}
Symbol
f_i
t_cyc
f_o
t_cyce
t_ADRE
PW_RE
t_ADWE
PW_WE
t_DSR
t_DSR
t_DHR
t_ACCR
t_WDWE
t_DSW
t_DHW
Min
D.C.
25
D.C.
50
5
35
5
23
24
28
0
11
7
31
8
Max
40.0
∞
20.0
∞
—
—
—
—
—
—
—
—
—
—
—
Unit
MHz
ns
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
1280
MC9S12XDP512 Data Sheet, Rev. 2.21
Freescale Semiconductor