MC9S12XD256CAL Datasheet, PDF (1338/1348 Pages) Freescale Semiconductor, Inc – This specification describes the function of the clocks and reset generator (CRG).

Appendix G Detailed Register Map
0x02C0–0x02DF Analog-to-Digital Converter 10-Bit 8-Channel (ATD0) Map
Address Name
Bit 7
0x02C0
0x02C1
0x02C2
0x02C3
0x02C4
0x02C5
0x02C6
0x02C7
0x02C8
0x02C9
0x02CA
0x02CB
0x02CC
0x02CD
0x02CE
0x02CF
0x02D0
0x02D1
0x02D2
0x02D3
0x02D4
0x02D5
R
ATD0CTL0
W
R
ATD0CTL1
W
R
ATD0CTL2
W
R
ATD0CTL3
W
R
ATD0CTL4
W
R
ATD0CTL5
W
R
ATD0STAT0
W
R
Reserved
W
R
ATD0TEST0
W
R
ATD0TEST1
W
R
Reserved
W
R
ATD0STAT1
W
R
Reserved
W
R
ATD0DIEN
W
R
Reserved
W
R
ATD0PTAD0
W
R
ATD0DR0H
W
R
ATD0DR0L
W
R
ATD0DR1H
W
R
ATD0DR1L
W
R
ATD0DR2H
W
R
ATD0DR2L
W
0
ETRIG
SEL
ADPU
0
SRES8
DJM
SCF
U
U
U
0
CCF7
0
IEN7
0
Bit7
Bit15
Bit7
Bit15
Bit7
Bit15
Bit7
Bit 6
0
0
AFFC
S8C
SMP1
DSGN
0
U
U
U
0
CCF6
0
IEN6
0
6
14
Bit6
14
Bit6
14
Bit6
Bit 5
0
0
AWAI
Bit 4
0
0
Bit 3
0
0
ETRIGLE ETRIGP
Bit 2
WRAP2
ETRIG
CH2
ETRIGE
Bit 1
WRAP1
ETRIG
CH1
ASCIE
S4C
S2C
S1C
FIFO
FRZ1
SMP0
PRS4
SCAN
MULT
ETORF
U
FIFOR
U
PRS3
0
0
U
PRS2
CC
CC2
U
PRS1
CB
CC1
U
U
U
U
U
U
0
0
0
0
0
0
0
0
0
0
CCF5
CCF4
CCF3
CCF2
CCF1
0
0
0
0
0
IEN5
0
5
13
0
13
0
13
0
IEN4
0
4
12
0
12
0
12
0
IEN3
0
3
11
0
11
0
11
0
IEN2
0
2
10
0
10
0
10
0
IEN1
0
1
9
0
9
0
9
0
Bit 0
WRAP0
ETRIG
CH0
ASCIF
FRZ0
PRS0
CA
CC0
U
U
SC
0
CCF0
0
IEN0
0
BIT 0
Bit8
0
Bit8
0
Bit8
0
1340
MC9S12XDP512 Data Sheet, Rev. 2.21
Freescale Semiconductor